Valentin V. Bartenev
72fc497980
Replace the two separate volatile counters (s_idle_ticks, s_busy_ticks) with a two-element array s_ticks[2]: [0] = idle ticks (xTaskGetCurrentTaskHandle() != s_idle_handle → false → 0) [1] = busy ticks (xTaskGetCurrentTaskHandle() != s_idle_handle → true → 1) The tick hook becomes a single branchless statement: s_ticks[xTaskGetCurrentTaskHandle() != s_idle_handle]++; This eliminates the conditional branch from the tick ISR at the cost of a few additional instructions in IRAM. On Xtensa LX7 the branch is somewhat unpredictable — the system alternates between idle and busy — so removing the misprediction penalty (~5–10 cycles/call) outweighs the slightly larger code size. _onSample() is updated to read s_ticks[0] (idle) and s_ticks[1] (busy) accordingly. All other logic is unchanged.
41 righe
819 B
C++
41 righe
819 B
C++
#pragma once
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#ifdef ESP32
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#include <stdint.h>
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#include "esp_attr.h"
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#include "esp_timer.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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class CPUUsageTracker {
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public:
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void begin();
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float getCore0Util() const {
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return (float)_sma_sum * (1.0f / (SMA_WINDOW * 255.0f));
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}
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private:
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static constexpr uint8_t SMA_WINDOW = 64; // power of 2 — enables & mask
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static volatile uint32_t s_ticks[2]; // [0] = idle ticks, [1] = busy ticks
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static TaskHandle_t s_idle_handle;
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static void IRAM_ATTR s_tick_hook();
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static void s_sample_cb(void* arg);
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uint32_t _last_idle = 0;
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uint32_t _last_busy = 0;
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uint8_t _sma_buf[SMA_WINDOW] = {};
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uint8_t _sma_idx = 0;
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volatile uint16_t _sma_sum = 0;
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esp_timer_handle_t _timer = nullptr;
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void _onSample();
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};
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#endif
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