|
|
@@ -7,19 +7,26 @@ void HeltecV4Board::begin() {
|
|
|
pinMode(PIN_ADC_CTRL, OUTPUT);
|
|
|
digitalWrite(PIN_ADC_CTRL, LOW); // Initially inactive
|
|
|
|
|
|
+ // Set up digital GPIO registers before releasing RTC hold. The hold latches
|
|
|
+ // the pad state including function select, so register writes accumulate
|
|
|
+ // without affecting the pad. On hold release, all changes apply atomically
|
|
|
+ // (IO MUX switches to digital GPIO with output already HIGH — no glitch).
|
|
|
pinMode(P_LORA_PA_POWER, OUTPUT);
|
|
|
digitalWrite(P_LORA_PA_POWER,HIGH);
|
|
|
+ rtc_gpio_hold_dis((gpio_num_t)P_LORA_PA_POWER);
|
|
|
|
|
|
- rtc_gpio_hold_dis((gpio_num_t)P_LORA_PA_EN);
|
|
|
pinMode(P_LORA_PA_EN, OUTPUT);
|
|
|
digitalWrite(P_LORA_PA_EN,HIGH);
|
|
|
+ rtc_gpio_hold_dis((gpio_num_t)P_LORA_PA_EN);
|
|
|
pinMode(P_LORA_PA_TX_EN, OUTPUT);
|
|
|
digitalWrite(P_LORA_PA_TX_EN,LOW);
|
|
|
|
|
|
+ esp_reset_reason_t reason = esp_reset_reason();
|
|
|
+ if (reason != ESP_RST_DEEPSLEEP) {
|
|
|
+ delay(1); // GC1109 startup time after cold power-on
|
|
|
+ }
|
|
|
|
|
|
periph_power.begin();
|
|
|
-
|
|
|
- esp_reset_reason_t reason = esp_reset_reason();
|
|
|
if (reason == ESP_RST_DEEPSLEEP) {
|
|
|
long wakeup_source = esp_sleep_get_ext1_wakeup_status();
|
|
|
if (wakeup_source & (1 << P_LORA_DIO_1)) { // received a LoRa packet (while in deep sleep)
|
|
|
@@ -50,7 +57,9 @@ void HeltecV4Board::begin() {
|
|
|
|
|
|
rtc_gpio_hold_en((gpio_num_t)P_LORA_NSS);
|
|
|
|
|
|
- rtc_gpio_hold_en((gpio_num_t)P_LORA_PA_EN); //It also needs to be enabled in receive mode
|
|
|
+ // Hold GC1109 FEM pins during sleep to keep LNA active for RX wake
|
|
|
+ rtc_gpio_hold_en((gpio_num_t)P_LORA_PA_POWER);
|
|
|
+ rtc_gpio_hold_en((gpio_num_t)P_LORA_PA_EN);
|
|
|
|
|
|
if (pin_wake_btn < 0) {
|
|
|
esp_sleep_enable_ext1_wakeup( (1L << P_LORA_DIO_1), ESP_EXT1_WAKEUP_ANY_HIGH); // wake up on: recv LoRa packet
|